1. Field of the Invention
The present invention relates to the control of the flash memory, and more particularly, to a method for managing a memory apparatus, and the associated memory apparatus and controller thereof.
2. Description of the Prior Art
Due to the development of the flash memory techniques, various portable memory apparatuses (e.g., memory cards which meet the SD/MMC, CF, MS and XD specifications) are widely implemented for various applications. Hence, the access control of the flash memories in these portable memory apparatuses has become an important issue.
For example, commonly used NAND flash memories can be categorized into two types, the single level cell (SLC) flash memories and the multiple level cell (MLC) flash memories. Each transistor used as a memory cell in the SLC flash memory has only two charge values which are represented in logic values 0 and 1. Further, the storage capacity of each transistor used as a memory cell in the MLC flash memory is fully utilized, and the transistor of the MLC flash memory is driven by a higher voltage, to record multiple bits information (e.g., 00, 01, 11 and 10) in one transistor through various levels of voltages. Theoretically, the recording density of the MLC flash memory may exceed two times the recording density of the SLC flash memory. This is good news to related industries having difficulties in developing NAND flash memories.
Compared with the SLC flash memory, the cost of manufacturing the MLC flash memory is cheaper, and the MLC flash memory is capable of providing a larger capacity in a limited space. Hence, the MLC flash memory is widely applied to various portable memory apparatuses in the market. According to a related art technique, since the operations of some types of MLC flash memories are complicated, a traditional memory controller configures a portion of physical blocks in an MLC flash memory to serve as SLC memory blocks, for receiving the write data from a host device. However, some problems are thereby generated. For example, since a portion of physical blocks in the MLC flash memory is configured as SLC memory blocks, the amount of physical blocks of the MLC flash memory which can be used as MLC memory blocks are fewer. For another example, the traditional memory controller temporarily writes the received data into SLC memory blocks first, and then collects data to the MLC memory blocks from the SLC memory blocks, wherein the storage space of these SLC memory blocks may easily run out. Hence, the work load of the memory controller is greatly increased. Therefore, there is a need for a novel method for enhancing the control of the data access of the flash memory, to raise the overall performance without introducing side effects (e.g., errors of stored data).